Silicon, foundries, GPUs — the substrate of everything.
137 stories · page 2 of 6
Rapid expansion of AI datacenter projects across the United States is projected to outpace the available supply of advanced chips, primarily due to constraints in advanced packaging capacity, potentially capping deployment at 20-25 gigawatts by 2027.
A new patent reveals Intel's strategy to integrate MicroLEDs directly into chip packaging, potentially solving the bandwidth bottleneck through glass-substrate-based co-packaged optics.
Qualcomm unveiled two new flagship smartphone SoCs that can run a 30‑billion‑parameter mixture‑of‑experts model locally, marking a leap in on‑device AI performance and reshaping the mobile compute landscape.
Nvidia's RTX Mega Geometry 2.0 SDK introduces dynamic VRAM streaming for ray-tracing assets, solving memory bottlenecks in complex rendering pipelines.
The massive expansion of the Colossus supercomputer cluster highlights the shift in AI scaling bottlenecks from silicon availability to utility-scale power generation and liquid-cooling infrastructure.
Recent hardware stress testing reveals that Nvidia's flagship GeForce RTX 5090 pushes its 16-pin power connector past 90 degrees Celsius at peak 650W draws, highlighting critical thermal engineering challenges in high-wattage consumer silicon.
Micron is phasing out production of 2GB GDDR7 memory modules to prioritize higher-density 3GB parts, illustrating a broader structural shift in memory manufacturing toward high-margin AI hardware.
Singapore startup Nexstrom secures fresh capital to build scalable manufacturing equipment for transition metal dichalcogenides, aiming to move 2D semiconductors out of the academic lab and into commercial semiconductor fabrication lines.
For the first time, the manufacturing cost of advanced DRAM on a per-area basis has surpassed that of leading-edge compute chips, signaling a fundamental shift in semiconductor economics driven by the escalating demands of artificial intelligence workloads.
Researchers in China have demonstrated 3nm-class gate-all-around transistors without EUV lithography, signaling a shift in manufacturing strategy despite significant yield and density hurdles.
Beyond the silicon performance metrics, the rapid scaling of AI infrastructure is creating a massive, overlooked crisis in hardware lifecycle management and electronic waste.
AMD has released initial performance benchmarks for its upcoming EPYC 'Venice' CPUs, positioning its high-core-count processors as a direct challenge to Nvidia's Vera server offerings, particularly in compute-intensive workloads.
Huawei has pulled forward its Ascend NPU roadmap, signaling a strategic shift to maintain domestic AI compute parity as export controls tighten around advanced silicon.
Apple is reportedly integrating Nvidia's NVLink Fusion interconnect into its custom M8 Ultra AI servers, signaling a significant strategic pivot for its 2029 data center ambitions and a major validation for Nvidia's high-performance AI ecosystem.
OpenAI has introduced Jalapeño, its debut AI accelerator, featuring 13.4 petaflops of 4-bit compute and 232GB of advanced memory. Notably, the chip's development process leveraged OpenAI's own large language models, signaling a significant vertical integration trend in AI hardwar
Nvidia is reallocating Blackwell-class silicon away from consumer gaming to address the surging demand for local agentic AI, prioritizing VRAM density over gaming throughput.
Community-driven optimization of FSR 4 on AMD's BC-250 mining APU highlights the latent performance potential in repurposed, PS5-derived silicon through software-level efficiency gains.
Intel’s unveiling of the Diamond Rapids server architecture at Hot Chips 2026 marks a decisive shift toward high-bandwidth density and modular compute design for the data center.
The IO500 supercomputing benchmark committee has stripped Chinese vendor Sugon of its Production crown for the ParaStor F9000, citing a failure to meet reproducibility requirements and public availability of hardware and architecture details. This decision reinstates Intel-powere
Desktop add-in-board shipments reached a four-year peak in Q2, with Nvidia capturing a dominant 90% market share, highlighting a consolidating GPU landscape and shifting supply-demand dynamics amidst rising prices.
OpenAI's engagement with Samsung for future AI ASIC manufacturing signals a strategic pivot towards supply chain diversification and massive volume scaling. This move underscores the escalating demand for specialized AI silicon and the competitive dynamics within advanced foundry
TSMC has detailed its timeline for integrating High-NA EUV lithography into its production roadmap by 2030, targeting A10 or A11 process technologies, marking a critical step for future transistor scaling and chip density.
Intel has processed over one million wafers using High-NA EUV lithography, positioning itself ahead of industry competitors in critical next-generation manufacturing technology, complemented by advancements in 6x12 photomasks.
The European Union's ambitious plan for AI sovereignty is being throttled by a structural dependence on non-European silicon and advanced foundry capacity.