Intel Doubles Down on Raptor Lake Legacy as DDR5 Market Strains DIY Adoption
Intel is extending the lifecycle of its LGA 1700 platform, citing a surge in demand for Raptor Lake as high DDR5 memory costs keep cost-conscious builders tethered to DDR4.
Silicon, foundries, GPUs — the substrate of everything.
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Intel is extending the lifecycle of its LGA 1700 platform, citing a surge in demand for Raptor Lake as high DDR5 memory costs keep cost-conscious builders tethered to DDR4.
Advanced multiphysics simulation tools are becoming indispensable for identifying and mitigating failure points in high-voltage electronics, a critical requirement for electric vehicles, data centers, and renewable energy infrastructure.
As modern AI accelerators push thermal and power limits to the brink, legacy silicon like Nvidia's 2020-era Ampere-based A100 is finding an extended lease on life through long-term cloud contracts.
Intel's successful $19.7 billion capital raise provides the critical financial runway needed to scale its 14A process node and deploy expensive High-NA EUV lithography.
As a global high-bandwidth memory shortage bites, Nvidia is reportedly testing Rubin Ultra configurations with as little as 192 GB of HBM4, forcing a strategic shift in next-generation AI cluster architecture.
Leaked Geekbench results for Nvidia's upcoming ARM-based RTX Spark SoC reveal 20-core and 18-core variants, showcasing massive multi-threaded performance that threatens both x86 mobile processors and Qualcomm's Windows on ARM dominance.
Chinese memory maker CXMT has demonstrated DDR5-8800 speeds on AMD platforms, proving that domestic silicon can match the performance of global giants despite strict export controls.
Researchers at MIT have uncovered TONTOU, a microarchitectural attack that leverages hardware timer interrupts to bypass existing Spectre mitigations on modern Intel and AMD processors.
Anthropic is establishing an in-house chip design team, signaling a strategic shift towards vertically integrated hardware-software co-design to enhance the efficiency and speed of its large language models. This move reflects a growing trend among major AI developers to control
As the semiconductor industry prepares for the post-nanosheet era, leading chipmakers are splitting over whether monolithic or sequential integration is the viable path for complementary FETs.
As vertical high-bandwidth memory stacks hit a critical thermal ceiling, packaging engineers are turning to lateral integration and hybrid bonding to sustain AI accelerator scaling.
As traditional copper interconnects hit physical limits, major foundries are racing to deploy co-packaged optics, each taking a fundamentally different approach to silicon photonics integration.
As physical limits choke copper's conductivity at advanced nodes, researchers are turning to topological materials and exotic quasiparticles to solve the semiconductor interconnect crisis.
A technical deep dive into Nvidia's upcoming Vera CPU reveals a highly customized Arm architecture designed to eliminate memory and interconnect bottlenecks in massive AI clusters.
The semiconductor industry faces a prolonged memory supply crisis as the production of high-bandwidth memory for AI hardware consumes disproportionate wafer allocations.
Intel’s discontinuation of Optane memory, known for ultra-low latency and high endurance, leaves AI and memory-intensive workloads reliant on traditional DRAM amid ongoing supply constraints.
A prototype Microsoft Surface Laptop Ultra equipped with Nvidia's new N1X chip, dubbed RTX Spark, reveals promising performance improvements despite evident prototype limitations.
Researchers at Cornell Tech have developed an optical communication system enabling robots to receive AI model updates on the fly, using LED-to-lens data transmission.
AMD and Cerebras collaborate to integrate EPYC processors with Cerebras' wafer-scale AI engines in the Helios platform, targeting low-latency, high-throughput AI inference workloads for data centers.
Nvidia reveals architectural enhancements in its Rubin GPU platform focused on boosting inference performance and power efficiency across the data center hierarchy.
The ZEISS Crossbeam 750 FIBSEM introduces uninterrupted low-kV focused ion beam milling, enhancing TEM lamella preparation and tomography with higher resolution and faster acquisition.
AMD’s upcoming 10-core Medusa Point mobile APU achieves its highest Geekbench single-core score yet, surpassing all other x86 mobile chips and signaling a major leap in mobile CPU performance.
Nvidia's next-gen RTX 50 Super GPUs face launch delays as the cost of 3GB GDDR7 memory modules triples that of 2GB variants, threatening to push prices well beyond targets.
ASML’s decision to raise prices on its Low-NA EUV lithography tools challenges TSMC’s capital expenditure strategy, potentially reshaping foundry capacity growth and semiconductor node progression.