Silicon, foundries, GPUs — the substrate of everything.
123 stories · page 5 of 6
Intel's upcoming 52-core Nova Lake processor ramps power consumption to 474W PL2, pushing motherboard design with triple 8-pin EPS connectors on the new LGA1954 platform.
Hybrid bonding in 3D chip stacking is breaking records, enabling denser, more efficient semiconductor integration as transistor scaling nears atomic limits.
IBM's breakthrough 0.7nm-class node leverages nanostack transistor architecture, doubling FEOL steps to achieve up to 50% performance uplift and 70% energy efficiency improvement over its 2nm-class technology.
OpenAI and Broadcom have introduced Jalapeño, a custom-designed inference ASIC, signaling a strategic shift towards purpose-built silicon for AI workloads. This collaboration highlights a rapid nine-month development cycle and emphasizes performance-per-watt optimization.
A tightening customs freeze on smuggled AI hardware has sent the black market price of five-year-old Nvidia A100 servers soaring to $82,000, underscoring the extreme premium on CUDA compatibility.
Qualcomm is diversifying its silicon portfolio with two new platforms targeting AI-driven wearables, signaling a shift toward ultra-low-power edge computing.
By replacing power-hungry floating-point multipliers with logarithmic addition, silicon startup Tensordyne aims to challenge Nvidia's dominance in hardware efficiency.
A collaboration between imec, ASML, and TSMC has successfully integrated n-type and p-type 2D-material transistors at a 50nm pitch on 300mm wafers, marking a major milestone for post-silicon sub-1nm scaling.
A presidential assertion about an Apple-Intel chip collaboration, though unconfirmed, highlights potential shifts in US semiconductor manufacturing and supply chain strategies.
Intel's enhanced 18A-P process has entered risk production, marking a significant step in its foundry roadmap by offering a 9% performance uplift at iso-power and 40% thermal resistance reduction. This 'drop-in' upgrade provides a compelling option for future silicon designs.
A physical teardown of Huawei's Kirin 9030 SoC reveals that SMIC's third-generation 7nm process achieves a 32.5nm metal pitch, but lacks the architectural scaling of Western nodes.
Intel is reportedly planning a second refresh of its Raptor Lake architecture under the Core 200 branding, leveraging mature silicon to fill budget tiers alongside next-generation Nova Lake processors.
AMD is targeting local AI development with a $3,999 Strix Halo-powered system, leveraging 128GB of unified memory to challenge Nvidia's workstation dominance.
With high-end GPU shipments to China blocked by US export controls, Nvidia is offering its Arm-based Vera server processors to Chinese data centers to maintain platform lock-in.
A pending U.S. International Trade Commission ruling could block imports of specific TSMC-manufactured chips, stemming from a patent infringement claim by rival UMC. This development, backed by U.S. lawmakers, raises significant concerns for global semiconductor supply chains and
A Dutch startup's reliance on GlobalFoundries' Dresden fab for its 'all-European' silicon highlights the geopolitical and corporate compromises of regional semiconductor sovereignty.
TSMC's extensive fab expansion, encompassing multi-fab N2 ramps and significant CoWoS/SoIC capacity growth, directly addresses critical bottlenecks to meet escalating demand for advanced AI accelerators.
A Chinese startup reports successful 8-inch photonic chip wafer production using nanoimprint lithography, potentially bypassing DUV restrictions and drastically cutting manufacturing costs by 90%.
A new multi-year agreement between Nvidia and SK hynix shifts high-bandwidth memory from a commodity supply model to deep, joint silicon co-design.
New add-in cards utilizing AMD's Promontory 21 chipset offer a low-cost alternative to expensive PCIe switches, bypassing motherboard bifurcation limits for dense I/O.
Gigabyte's new 1U high-density server packs 40 Intel Lunar Lake processors, demonstrating how client-grade on-package memory architectures are redefining edge compute density.
AMD's upcoming Helios platform, designed to challenge Nvidia's rack-scale dominance, will initially rely on UALink-over-Ethernet, introducing latency and overhead trade-offs for scale-up AI clusters.
Nvidia is making a strategic push into the CPU market, partnering with major PC vendors to integrate AI agents directly onto devices. This move signals a significant expansion of its silicon footprint beyond GPUs, leveraging its AI expertise to redefine the personal computing lan
AMD's decision to re-release its iconic 3D V-Cache processor exposed an overlooked challenge in advanced packaging: the rapid obsolescence of early silicon-on-silicon bonding processes.