All stories tagged foundry on The Silicon Valley News.
Intel Foundry Services is reportedly securing new customers, raising questions about whether previous cost-cutting initiatives might hinder its long-term capacity and technological readiness for broader industry demands.
A $4 billion industrial park in Texas aims to transplant Taiwan's specialized chemicals, precision tooling, and packaging suppliers directly alongside domestic fab expansions.
Seven years after abandoning the FinFET race, GlobalFoundries pivots back to advanced scaling with a 7nm-class FD-SOI node targeting high-efficiency AI and RF applications.
Researchers have demonstrated a method using controlled oxygen introduction to regulate transition metal dichalcogenide growth, addressing critical nucleation flaws for future sub-nanometer logic nodes.
The CHIPS Act pivots toward long-term R&D with a massive investment in IBM-backed Anderon, aiming to bridge the gap between lab-scale qubits and industrial manufacturing.
Elon Musk's confirmed discussions with TSMC about the 'Terafab' project suggest a new level of strategic collaboration in advanced chip manufacturing, potentially reshaping how high-volume, specialized silicon is developed and produced.
Singapore startup Nexstrom secures fresh capital to build scalable manufacturing equipment for transition metal dichalcogenides, aiming to move 2D semiconductors out of the academic lab and into commercial semiconductor fabrication lines.
Researchers in China have demonstrated 3nm-class gate-all-around transistors without EUV lithography, signaling a shift in manufacturing strategy despite significant yield and density hurdles.
OpenAI's engagement with Samsung for future AI ASIC manufacturing signals a strategic pivot towards supply chain diversification and massive volume scaling. This move underscores the escalating demand for specialized AI silicon and the competitive dynamics within advanced foundry
TSMC has detailed its timeline for integrating High-NA EUV lithography into its production roadmap by 2030, targeting A10 or A11 process technologies, marking a critical step for future transistor scaling and chip density.
Intel has processed over one million wafers using High-NA EUV lithography, positioning itself ahead of industry competitors in critical next-generation manufacturing technology, complemented by advancements in 6x12 photomasks.
TSMC's equipment procurement needs have surged dramatically due to unprecedented AI-driven demand, yet its capital expenditure growth lags, signaling potential capacity constraints for advanced silicon production.
The conviction of a former Samsung engineer reveals the technical blueprints behind CXMT's push to bypass years of DRAM process development and challenge global memory leaders.
Samsung Foundry has reportedly raised contract prices by up to 15 percent on its mature and advanced nodes, signaling tight capacity and a shifting geopolitical landscape for fabless designers.
Intel's successful $19.7 billion capital raise provides the critical financial runway needed to scale its 14A process node and deploy expensive High-NA EUV lithography.
As the semiconductor industry prepares for the post-nanosheet era, leading chipmakers are splitting over whether monolithic or sequential integration is the viable path for complementary FETs.
As traditional copper interconnects hit physical limits, major foundries are racing to deploy co-packaged optics, each taking a fundamentally different approach to silicon photonics integration.
As physical limits choke copper's conductivity at advanced nodes, researchers are turning to topological materials and exotic quasiparticles to solve the semiconductor interconnect crisis.
Intel's foundry business, revitalized under CEO Lip-Bu Tan, lands Fortinet as its inaugural customer for security-focused chip manufacturing, signaling strategic shifts in chip supply chains.
ASML’s decision to raise prices on its Low-NA EUV lithography tools challenges TSMC’s capital expenditure strategy, potentially reshaping foundry capacity growth and semiconductor node progression.
Japanese chipmaker Rapidus aims to disrupt the advanced foundry market with 2nm-class silicon priced around $20,000 per wafer, undercutting TSMC's rates and challenging established pricing norms.